EEsim is an open-source browser-based simulation tool, created Created by Dr Danial Chitnis of Electronics and Electrical Engineering at The University of Edinburgh, for electrical and electronic circuit analysis.

 EEsim’s input is a SPICE compatible netlist, and the output is a plot of current and voltage nodes, information on the simulation results, and a downloadable CSV file for further analysis in external popular analysis software packages such as Numpy and Python. 

Since the input netlist is text-based, it has the advantage of version control via GitHub, easy sharing, scripting, and automation. The backend of EEsim is based on ngspice, and all the computation happens inside the browser using WebAssembly (WASM) technology.

Additionally, it respects the user privacy since no data leaves the browser’s sandboxed environment. EEsim offers a convenient tool for brainstorming and sharing of circuit simulation with a modern UX/UI contributing to the growing community of the open-source integrated circuit hardware. 

Click here for the EEsim tool

Click here for a webinar about the EEsim tool by Dr Danial Chitnis

 

 

Created by Dr Danial Chitnis of Electronics and Electrical Engineering at The University of Edinburgh, danchitnis/EEsim is licensed under the MIT Licence

 

Header Image: Screenshot from the EEsim tool